ID:13978 VHDL error at <location>: a matching case statement must have a '?' in the beginning as well at the end of the case statement.

CAUSE: You specified a '?' in the case statement, presumably to indicate that it is a matching case statement. However, the syntax of the matching case statement is not correct. A matching case statement must have a '?' in the beginning as well as at the end of the case statement. The following is the correct way to specify a matching case statement:
case? expression is
case statement alternatives
.
.
.
end case? ;

               

ACTION: Use the correct syntax to indicate a matching case statement, or remove the '?' to indicate an ordinary case statement.