ID:13553 Verilog HDL error at <location>: parameter "<name>" has no initial or actual value

CAUSE: You did not declare an initial value for the specified parameter, and you did not set an actual value using a parameter value assignment or defparam. Verilog HDL requires all parameters to have initial values, but Quartus Prime only requires that a parameter has an initial or an actual value. Your code may not compile without error in other tools unless you declare an initial value for the parameter.

ACTION: Declare an initial value for the parameter or set a value for the parameter on every instance of the enclosing module.