ID:13335 Verilog HDL syntax error at <location>: illegal character <character> in octal number <oct>.

CAUSE: In a Verilog Design File (.v) at the specified location, the specified octal constant value contains one or more illegal characters, that is, characters other than 0..7, x, or z.

ACTION: Make sure the octal constant value contains only 0..7, x, or z characters.