ID:17137 Verilog HDL error at <location>: local variable passed to formal <string> of sequence <string> to which ended or triggered is applied. The local variable does not flow out of the sequence

CAUSE: Quartus Prime Integrated Synthesis generated the specified error message for the specified location in a Design File.

ACTION: Fix the problem identified by the message text. A future version of the Quartus Prime software will provide more extensive Help for this error message.