ID:199011 Verilog Test Bench File or VHDL Test Bench File must be specified with --testbench_file option when using --vector_source option

CAUSE: You used the --vector_source option but did not specify a VHDL Test Bench File (.vht). You must specify a Verilog Test Bench File or VHDL Test Bench File using the --testbench_file option if you use the --vector_source option.

ACTION: Specify a Verilog Test Bench File or VHDL Test Bench File to use with the --testbench_file option.