ID:199012 File name "<name>" used with --testbench_file option is illegal -- file name must have .vt or .vht file extension

CAUSE: You specified a file name using the --testbench_file option. However, the file name you specified is illegal. The file name must be a VHDL Test Bench File (.vht) with a .vt or .vht file extension.

ACTION: Specify a Verilog Test Bench File or VHDL Test Bench File as the file name.