ID:13085 WYSIWYG I/O primitive "<name>" is in <name> mode, but it is connected to the pin "<name>" in <name> mode
CAUSE: The Quartus Prime software expects that each WYSIWYG I/O primitive in the design is connected to an appropriate top-level pin at its padio port, but the specified WYSIWYG I/O primitive is connected to an incorrect type of pin. The legal connections for WYSIWYG I/O primitives are as follows:
- An output WYSIWYG I/O primitive should be connected to exactly one output pin at its padio port, and the padio port should not have any other fan-outs.
- An input WYSIWYG I/O primitive should be connected to an input pin at its padio port and the input pin should not have any other fan-outs.
- A bidirectional WYSIWYG I/O primitive should be connected to exactly one bidirectional pin at its padio port, and the bidirectional pin or the padio port should not have any other fan-outs.
ACTION: Make sure that the specified WYSIWYG I/O primitives are properly connected to the correct top-level pins. If you are using an EDA tool, contact the technical support for the EDA tool regarding this message. For further assistance contact Intel Technical Support by creating a Service Request at www.altera.com/mysupport. This message is a submessage of the message that precedes it in the Messages window and the Analysis & Synthesis Messages section of the Report window.