ID:20599 A valid 'External Memory Interface for HPS Intel Agilex FPGA IP' component is required when using the EMIF conduit in HPS - Add a HPS-EMIF IP component or, if you do not intend to use the EMIF component, set the HPS AXI slave interface 'Enable/Data width' to Unused and disable the 'EMIF_CONDUIT_Enable'.

CAUSE: MPFE is detected in Agilex device but HPS_EMIF handoff information is missing.

ACTION: Instantiate HPS_EMIF IP and set the HPS DDR width to a value greater than 0 in Platform Designer. Regenerate the design.