ID:176593 Cannot place <name> PLL "<name>" in PLL location <name> -- compensated output clock pin "<name>" of the PLL must be placed in dedicated output clock I/O -- PLL is in zero-delay buffer mode

CAUSE: You assigned the specified enhanced PLL to use zero-delay buffer mode. However, the Fitter cannot place the specified compensated output clock pin of the specified PLL, because the Fitter cannot find a dedicated output clock I/O location to place the output clock pin.

ACTION: Assign the compensated output clock pin to an output clock I/O location that is fed by the PLL through dedicated routing.