ID:170060 Can't find legal locations for <number> of the <type> slice(s) in the design

CAUSE: The Fitter cannot find places for all of the DSP block slices in the design for one of the following reasons:
  • You created location assignments that restrict the placement of the DSP block slices.
  • The number of DSP block slices in the design exceeds the number on the device.
  • There are too many DSP block slices with conflicting modes in the design.
  • The scanout signals, if used, fan out to logic that is not part of another DSP block slice, and therefore require the use of external routing.
  • You have incremental compilation turned on, and two or more design partitions have DSP blocks. Unless you have specified the Maximum DSP Block Usage for each partition, the Quartus Integrated Synthesis (QIS) independently balances the DSP blocks in each partition against the resources available in the used device. This can lead to over-allocation of DSP blocks, resulting in this error. To avoid this error, you should set the Maximum DSP Block Usage assignment on each partition to manually limit the number of DSP blocks used.
  • The DSP block slices are assigned to a Logic Lock region that does not cover the required number of resource blocks.
  • One or more of the required DSP blocks on the device are covered by Logic Lock regions with the Reserved property set to On or Limited. The Fitter cannot use these resource blocks to fit design elements that are not members of the reserved Logic Lock region.
ACTION: Select a larger device, set the Maximum DSP Block Usage if you are using partitions, or delete or change the location assignments for the design. Also make sure that the number of DSP block slices with conflicting modes does not exceed the number of DSP block slices on the device. If the DSP block slices are assigned to a Logic Lock region, one or more of the following actions may resolve the problem:
  • Adjust the size and/or origin of the region to make sure that it covers enough resource blocks for its members. In addition, make sure that the required resource blocks are not also covered by another Logic Lock region with the Reserved property set to On or Limited.
  • Consider setting the region size and origin to Auto and Floating, respectively. This allows the Fitter to automatically determine a feasible region placement.
  • Reduce the region's resource requirement by eliminating some or all of its members requiring the specified resource type. You may also fine-tune existing region memberships by specifying a list of Excluded Element Types for each Logic Lock membership assignment (e.g. to exclude all design elements of type DSP from being assigned to the region).