ID:15066 Clock input port inclk[<number>] of PLL "<name>" must be driven by a non-inverted input clock pin

CAUSE: The specified clock input port of the specified PLL is driven by an illegal source. The clock input port of the PLL must be driven by a non-inverted input clock pin.

ACTION: Modify the design so that the clock input port of the specified PLL is driven by a non-inverted clock input pin.