ID:20089 When ACCUMULATE port is used and second pipeline register is enabled, accum_2nd_pipeline_clken for the DSP block WYSIWYG primitive "<atom name>" must be set as the same value as second_pipeline_clken.

CAUSE: Illegal clock enable parameter configuration of accum_2nd_pipeline_clken for the specified DSP block WYSIWYG primitive"

ACTION: Correct the clock enable parameter of the specified accum_2nd_pipeline_clken.