ID:15193 Current design uses PLL enable input pin "<name>" and PLL enable input pin "<name>", but only one PLL enable input pin can be used in <name> device family

CAUSE: You set the specified PLL enable input pins in the current design; however, the specified device family must have only one PLL enable input pin.

ACTION: Modify the design so that only one input pin drives the ena port of all enhanced or fast PLLs and the pllenable port of all XGMII state machine atoms.