ID:12890 The CGB parameter x1_div_m_sel is set to "<number>". When operating in external feedback mode, the divider value for the X1 high frequency PLL mux (x1_div_m_sel) must be set to 1

CAUSE: The CGB parameter x1_div_m_sel is set to a value other than 1 when operating in external feedback mode.

ACTION: Set the x1_div_m_sel parameter of the CGB to 1.