Parameters

Width of dio[] and internal data and q ports.

Width of the address port. LPM_WIDTHAD should be (but is not required to be) equal to LOG2(LPM_NUMWORDS). If LPM_WIDTHAD is too small, some memory locations will not be addressable. If it is too large, the addresses that are too high will return undefined (X) logic levels.

Number of words stored in memory. In general, this value should be (but is not required to be) 2 ^ LPM_WIDTHAD-1 < LPM_NUMWORDS <= 2 ^ LPM_WIDTHAD. If omitted, the default is 2 ^ LPM_WIDTHAD.

Name of the Memory Initialization File (.mif) Definition or Hexadecimal (Intel-Format) Output File (.hexout) Definition containing ROM initialization data ("<file name>"), or "UNUSED". If omitted, contents default to all 0s. The we port must be registered to support memory initialization.

Values are "REGISTERED", "UNREGISTERED", and "UNUSED". Controls whether the data port is registered. If omitted, the default is "REGISTERED".

Values are "REGISTERED", "UNREGISTERED", and "UNUSED". Controls whether the address[], memenab, and we ports are registered. If omitted, the default is "REGISTERED".

Values are "REGISTERED", "UNREGISTERED", and "UNUSED". Controls whether the dio[] port is registered. If omitted, the default is "REGISTERED".

Intel-specific parameter. You must use the LPM_HINT parameter to specify the USE_EAB parameter in VHDL Design Files. Values are "ON", "OFF", and "UNUSED". This parameter is not available for simulation with other EDA simulators and for MAX3000 and MAX7000 devices. If you want to use this parameter when you instantiate the function in a Block Design File (.bdf) Definition, you must specify it by entering the parameter name and value manually with the Parameters tab in the Symbol Properties dialog box or in the Block Properties dialog box. You can also use this parameter name in a Text Design File (.tdf) Definition or a Verilog Design File (.v) Definition