Example of a VHDL Design File with LPM Function Instantiation

For any parameterized function, you must declare all parameters used in the function, their types, and their values. The following example shows a VHDL design file that instantiates the lpm_ram_dq function. Attribute Declarations are used to declare the syn_black_box attribute and the name and type of each parameter. The syn_black_box attribute has the boolean type; refer to Intel® Quartus® Prime Help for information on whether a parameter is of integer or string type. Attribute Specifications are then used to assign values to each parameter.

The following example shows a direct instantiation of an library of parameterized modules (LPM) function. Use the IP Catalog to create the function, and then instantiate it in a design, refer to the Creating a Design for Use with the Synplify Software topic.

entity myram is
   port (
      clock, we: in bit;
      data : in bit_vector (3 downto 0);
      address: in bit_vector (1 downto 0);
      q: out bit_vector (3 downto 0)
end myram;

architecture arch1 of myram is 
   -- Declare the component myram_4x4 port
      data: in bit_vector (3 downto 0);
      address: in bit_vector (1 downto 0);
      inclock, outclock, we: in bit;
      q: out bit_vector (3 downto 0)
      end component;
   -- Declare the syn_black_box and parameters and their types
      attribute syn_black_box: boolean;
      attribute LPM_WIDTH: integer;
      attribute LPM_WIDTHAD: integer;
      attribute LPM_TYPE: string;
   -- Assign values to each attribute 
      attribute syn_black_box of myram_4x4: component is true;
      attribute LPM_WIDTH of myram_4x4: component is 4;
      attribute LPM_WIDTHAD of myram_4x4: component is 2;
   -- Specify the name of the LPM function as the value of the 
   -- LPM_TYPE 
      attribute LPM_TYPE of myram_4x4: component is "LPM_RAM_DQ";
      -- Instantiate the LPM
         component u1: myram_4x4 port map(data, address, clock, clock, we, q);
end arch1;