ID:13923 VHDL synthesis attribute or directive warning at <location>: ignored synthesis attribute or directive "<name>" because it does not have only two arguments

CAUSE: In a VHDL Design File (.v) at the specified location, you specified too many or too few arguments for the specified synthesis attribute or directive. The synthesis attribute or directive requires only two arguments; as a result, Quartus Prime Integrated Synthesis ignored the synthesis attribute or directive.

ACTION: Specify only two arguments for the synthesis attribute or directive.