ID:13527 Verilog HDL Defparam error at <location>: can't override parameters on primitive instance "<name>"

CAUSE: In a defparam assignment at the specified location in a Verilog Design File (.v), you attempted to override a parameter on the specified instance of a primitive. However, primitives do not declare parameters.

ACTION: Remove the defparam assignment, or check the primitive instantiation. You may have intended to instantiate a module.