Optimization Mode

Specifies your overall optimization focus for implementation of your synthesized logic. By default, the Compiler uses a balanced mode respecting the design's timing constraints. Use alternate modes to specify a different optimization focus. High effort modes enable additional optimizations that increase compilation time. Aggressive modes may increase compilation time and may also be detrimental to other optimizations. The following options are available:

Table 1. Optimization Modes (Compiler Settings Page)

Optimization Mode

Description

Balanced (Normal Flow)

Optimizes synthesis for balanced implementation that respects timing constraints.

Performance (High effort - increases runtime)

Makes high effort to optimize synthesis for speed performance. High effort increases synthesis run time.

Performance (Aggressive - increases runtime and area)

Makes aggressive effort to optimize synthesis for speed performance. Aggressive effort increases synthesis run time and device resource use.

Power (High effort - increases runtime)

Makes high effort to optimize synthesis for low power. High effort increases synthesis run time.

Power (Aggressive - increases runtime, reduces performance)

Makes aggressive effort to optimize synthesis for low power. Aggressive effort increases synthesis time and reduces speed performance.

Area (Aggressive - reduces performance)

Makes aggressive effort to reduce the device area required to implement the design.

Compile Time (Aggressive - reduces performance)

Reduces the compile time required to implement the design with reduced effort and fewer performance optimizations. This option also disables some detailed reporting functions.

Note: Turning on Aggressive Compile Time mode enables Intel® Quartus® Prime Settings File (.qsf) settings which cannot be overridden by other .qsf settings.