Optimize Timing logic option

A logic option that optimizes the placement and routing of a design to meet timing requirements.

This option is useful if you are having trouble fitting a design, particularly if the design has timing requirements that are easy to meet.

This option is a project-wide option. This option is available for all Intel devices supported by the Intel® Quartus® Prime software.

Scripting Information

Keyword:: optimize_timing

Settings: "Normal compilation" | off

*default