PLL Type logic option

You can use this logic option to specify the following types of PLLs for implementation:

• Auxiliary Transmit (ATX) PLL—The ATX PLL produces very low-jitter high-frequency clocks and is designed to operate in a narrow frequency range. The ATX PLL distributes high-speed clocks through the clock divider, which also produces low-speed parallel clocks. The ATX PLL allows you to clock and bond all of the transceiver channels with a single PLL.
• Clock Multiplier (CMU) PLL—The CMU PLL provide clocks to all the transmitter channels within the transceiver block.
• Fractional PLL (fPLL)— You can configure the fPLL as a single PLL or as two PLLs that you can use for independent applications. When configured individually, the fPLL is configured in conventional integer mode, which is equivalent to a general purpose PLL (GPLL). When configured as two PLLs, the output counters are shared between both PLLs in the block, and the fPLL is configured in enhanced fractional mode with third-order delta-sigma modulation.

This option is available for the Stratix^® V device family only.