Auto Shift Register Replacement logic option

Allows the Compiler to find a group of shift registers of the same length that can be replaced with the altshift_taps Intel® FPGA IP. The shift registers must all use the same clock and clock enable signals, must not have any other secondary signals, and must have equally spaced taps that are at least three registers apart.

This option is useful for finding areas of the design that can be implemented more efficiently, and as a result, minimizing the area and maximizing the speed of the design.

This option must be assigned to a design entity or node or it is ignored. This option is available for all Intel devices supported by the Intel® Quartus® Prime software.

Scripting Information

Keyword: auto_shift_register_recognition

Settings: auto* | always | off

*default