To perform a functional simulation with the QuestaSim software with command-line commands

Note:

You can use batch files to set up and compile each of the libraries automatically. Place all the commands displayed in the QuestaSim main window into a text file and name the file with a .do extension (that is, <file name>.do). Use this script to recompile the libraries if you update them.

To run a macro script:

  • From the Mentor Graphics® QuestaSim main window, chose Execute Macro.
  • In the Execute Do File dialog box, locate your QuestaSim macro file (.do).
  • Click Open.
  1. If you have not already done so, set up a QuestaSim project.
  2. To compile the simulation libraries, VHDL or Verilog HDL design file, and optional test bench file, type the following commands at the QuestaSim prompt:

    Map to library work:

    vlib lpm   
    vlib altera   
    vlib sgate   
    vmap lpm work   
    vmap altera work    
    vmap sgate work

    For VHDL-87 compliant designs:

    vcom -work work <path to library>/220pack.vhd  
    vcom [-87] -explicit -work work <path to library>/220model_87.vhd  
    vcom -work work <path to library>/altera_mf_components.vhd  
    vcom -work work <design name>.vhd  
    vcom -work work <test bench>.vhd

    For VHDL 93-compliant designs:

    vcom -93 -work work <path to library>/220pack.vhd  
    vcom -explicit -work work<path to library>/220model.vhd  
    vcom -work work <path to library>/altera_mf_components.vhd  
    vcom -93 -work work <path to library>/altera_mf.vhd  
    vcom -work work <design name>.vhd  
    vcom -work work <test bench>.vhd

    For Verilog HDL designs:

    vlog -work work <path to library>/220model.v  
    vlog -work work <path to library>/altera_mf.v  
    vlog -work work <design name>.v  
    vlog -work work <test bench>.v
  3. Load the VHDL or Verilog HDL design file or test bench file for the design into the QuestaSim software by typing one of the following commands at the command prompt:
    vsim <work library>.<design name>

    or

    vsim<work library>.<top-level design entity>
  4. Perform the functional simulation in the QuestaSim software.