Setting Up a Project with the Precision RTL Synthesis Software

Set up a project for your design in the Precision RTL Synthesis software:

  1. Start the Precision RTL Synthesis software.
  2. Click Set Working Directory in the Design window to open theSelect the Directory dialog box.
  3. Specify the path to your project directory, and click OK.
  4. Click Add Input Files to display the Open.
    1. In the Files of type list, select the type of design file you want to add to the project.
    2. In the File name box, type the name of the design file. Click OK.

    The design files appear under the Input Files directory in the Project Files window.

    The Precision RTL Synthesis software automatically detects the top-level design entity or module, and uses the name of the last file in the list as the name for the generated files (<file name>_impl_1), log files, reports, and netlist files.

  5. Click Setup Design in the Design window.
    1. Under Technology, expand the Altera folder. Select the appropriate Intel device family.
    2. In the Device list, select the appropriate device.
    3. In the Speed Grade list, select the speed grade.
    4. Optionally, specify Design Frequency, Default Input Delay, and Default Output Delay in the Project Settings dialog box.
    5. Click OK.
  6. Click Compile in the Design window to create a technology-independent implementation.
    The Precision RTL Synthesis software compiles the design, and the complete design hierarchy appears in the Design Hierarchy window.
To continue with the Precision RTL Synthesis design flow, assign design constraints with the Precision RTL Synthesis software.