Performing a Functional Simulation with the QuestaSim Software

You can run the Mentor Graphics^® QuestaSim software to perform a functional simulation of a VHDL or Verilog HDL design from the QuestaSim GUI or with command-line commands.

Note: For more information about using EDA simulators, refer to Mentor Graphics ModelSim^® and QuestaSim Support in the Intel^® Quartus^® Prime Handbook.

To continue with the QuestaSim simulation flow, perform a timing simulation with the QuestaSim software.