ID:186131 I/O pin "<name>" placed at pin location <name> powers down when the pllreset signal is asserted on XGMII state machine atom "<name>"
CAUSE: The specified I/O pin powers down when the pllreset
signal is asserted on the specified XGMII state machine
atom. This behavior is not supported in simulation and is allowed because you turned on the corresponding logic option.
ACTION: No action is required. To avoid receiving this message in the future, modify the design to remove the pllreset
signal.