ID:14811 Always-enabled tri-state buffer(s) removed
CAUSE: The design contains one or more always-enabled tri-state buffers that feed a non-tri-state logic, an open-drain buffer, or an output pin. The Quartus Prime software removes the tri-state buffer(s) because they are equivalent to a wire. For example, consider the following design that gives the above warning:
module test1 (input data1, output out);
wire tribuf, vcc;
assign vcc = 1'b1;
assign tribuf = vcc ? data1 : 1'bz;
assign out = tribuf;
endmodule
Here, the always-enabled tri-state buffer tribuf
feeds an output pin, and therefore is removed. Now consider the following design:
module test2 (input data1, data2, output out1, inout bidir);
wire tribuf, vcc;
assign vcc = 1'b1;
assign tribuf = vcc ? data1 : 1'bz;
and (tmp, data2, tribuf);
assign out1 = tmp;
assign bidir = tribuf;
endmodule
Here, the always-enabled tri-state buffer tribuf
feeds an AND
gate in addition to feeding a bidirectional pin. So, its fan-out to the AND
gate is removed. Finally, consider the following design:
module test3 (input data1, output out);
wire tribuf, opndrn, vcc;
assign vcc = 1'b1;
assign tribuf = vcc ? data1 : 1'bz;
assign opndrn = !tribuf ? !vcc : 1'bz;
assign out = opndrn;
endmodule
Here, the always-enabled tri-state buffer tribuf
feeds an open-drain buffer, and therefore is removed.
See the sub-messages to view a list of the removed tri-state buffers. ACTION: Avoid this warning message by removing the always-enabled tri-state buffers from the design. Otherwise, no action is required.