ID:15976 The phasectrlin[<number>] input of I/O clock divider "<name>" must be driven by resyncinputphasesetting[<number>] output of a DQS configuration primitive when USE_PHASECTRLIN parameter is set to true
CAUSE: The specified phasectrlin
input of the specified I/O clock divider block is not driven by the specified resyncinputphasesetting
output of a DQS configuration primitive while the USE_PHASECTRLIN
parameter is set to TRUE
.
ACTION: Check the design and make sure that the specified phasectrlin
input of the specified I/O clock divider block is driven by the specified resyncinputphasesetting
output of a DQS configuration primitive. Alternatively you can set the USE_PHASECTRLIN
parameter to a value other than TRUE
.