ID:15468 WYSIWYG primitive "<name>" has port A input registers using clk1, which is not allowed. Port A input registers can use only clock from clk0.
CAUSE: The specified WYSIWYG primitive has its port A input registers using clock from the clk1
port, which is illegal, since port A input registers can use only clock from clk0
.
ACTION: Modify the design so that the port A input registers of the WYSIWYG primitive use clk0
as clock.