ID:14633 Can't connect TRI or OPNDRN primitive "<name>" to pin "<name>" because primitive is already connected to bidirectional pin "<name>"
CAUSE: The specified
OPNDRN
primitive is connected to the two specified pins, one of which is bidirectional. However, if the TRI
or OPNDRN
primitive drives a bidirectional pin, the primitive can drive other primitives, and not other pins. This error may also occur in VHDL if an OUTPUT
primitive is declared as INOUT
. This is sometimes done to overcome the problem that OUTPUT
primitives cannot be used in expressions in VHDL. For example:entity test3 is
Port (
clk : in std_logic;
out_a: inout std_logic ;
out_b: out std_logic ;
data_in : in std_logic
);
end test3;
architecture test_arch of test3 is
begin
process (clk)
begin
if rising_edge(clk) then
out_a <= data_in;
end if;
end process;
out_b <= out_a;
end test_arch;
In this example, out_a
is really an OUTPUT
, but is declared as INOUT
because it is used in the expression out_b <= out_a
.ACTION: Modify the design so that the
TRI
or OPNDRN
primitive does not drive a bidirectional pin and another pin simultaneously. If you declared an OUTPUT
primitive as INOUT
in VHDL, introduce an internal signal to store the value of the output pin and use that signal in expressions. Then the INOUT
primitive can be changed into an OUTPUT
. For example:entity test3 is
Port (
clk : in std_logic;
out_a: out std_logic ;
out_b: out std_logic ;
data_in : in std_logic
);
end test3;
architecture test_arch of test3 is
signal tmp: std_logic;
begin
process (clk)
begin
if rising_edge(clk) then
tmp <= data_in;
end if;
end process;
out_a <= tmp;
out_b <= tmp;
end test_arch;