Board-level signal integrity analysis

Allows you to select HSPICE to generate HSPICE Simulation Deck File (.sp) Definition or IBIS to generate IBIS Output File (.ibs) Definition.

Note:
  • HSPICE model generation is available for supported device families ( Stratix® IV and Stratix® V ) . For all other families, refer to the SPICE models section of the Altera website Definition
  • For Stratix® V devices, you can specify the IBIS version. The options are 4.1 (default), 4.2, and 5.0.
Scripting Information

Keyword:eda_board_design_signal_integrity_tool

Settings:"IBIS (Signal Integrity)" | "HSPICE (Signal Integrity)" |"<None>*"

*default

IBIS model generation is fully supported for all devices supported by the Quartus® Prime software, except MAX® II device families. For additional IBIS model device support and support files, refer to the IBIS models section of the Signal Integrity section on the Altera website.

You can turn on Enable model selector to enable model selection in supported signal integrity analysis tools.

Scripting Information

Keyword:eda_ibis_model_selector

Settings:on | off*

*default

You can turn on Print per pin RLC package model with mutual coupling to generate an IBIS Output File (.ibs) with mutual coupling.

Scripting Information

Keyword:eda_ibis_mutual_coupling

Settings:on | off*

*default