- If you have not already done so, perform Setting Up the VCS MX Working Environment.
- Create a .synopsys_vss.setup file to include the mapping information for the work library, and to direct the VCS
MX software to use the functional simulation
libraries during simulation:
WORK > <work library>
220model > <work library>
altera_mf > <work library>
sgate > <work library>
<work library> : <physical path to work library>
- In the VCS MX shell, point the environment variable SYNOPSYS_SIM_SETUP to the .synopsys_vss.setup file.
- To create a work library in the project directory, type the
following command at a command prompt:
mkdir <work library>
Note:Intel recommends using the
Synopsys® VCS MX default library
names when you create a library. You should name the VCS MX software
libraries as follows:
- When you run the VCS MX software independently from
the
Quartus® Prime software, you should
name your library work.
- When you run the VCS MX software automatically from
the
Quartus® Prime software, the
work library is named
rtl_work for an RTL
simulation or gate_work for a
gate-level simulation. The library work is mapped to either rtl_work or gate_work.
- To compile the VHDL Design File (.vhd) Definition, testbench file (if you are using one) and
Quartus® Prime simulation libraries, type the following commands at a command
prompt:
vhdlan/usr/quartus/eda/sim_lib/220pack.vhd
vhdlan/usr/quartus/eda/sim_lib/220model.vhd
vhdlan /usr/quartus/eda/sim_lib/altera_mf_components.vhd
vhdlan /usr/quartus/eda/sim_lib/altera_mf.vhd
vhdlan <design name>.vhd
vhdlan <testbench file>.vhd
Important: If your design contains the alt2gxb IP Core, refer to the appropriate megafunction
topic for required settings information.