SystemVerilog Synthesis Support

Parent topic: SystemVerilog Synthesis Support

Section 22—Compiler Directives

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IEEE Subsection	Construct	Description
22.5.1	`'define` macros	Supported
22.7	`'timescale` directive	Supported
22.13	`'__FILE__`and`'__LINE__`	Supported

Parent topic: SystemVerilog Synthesis Support

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