How to use the Design Partition Planner Efficiently:

You can use the Design Partition Planner in an iterative process to explore and refine a design's partitioning scheme. By viewing timing information and the relative densities of connectivity between design entities in the Design Partition Planner and relating those factors to the physical placement of entities as displayed in the Chip Planner, you can make partitioning choices that achieve timing closure more efficiently.Also, by subdividing larger partitions into smaller logical partitions, you can reduce compilation time.

When you initially open a design in the Design Partition Planner, you see only the top-level design partition containing the top-level design entity.

You can extract entities from the top-level entity by dragging them into the surrounding white space, or by right-clicking an entity and clicking Extract from Parent. Extracting an entity allows you to see the relative connectivity and timing between each of the component entities.

You can continue extracting entities from the top-level entity to view more connectivity details. When you isolate an entity that is suited to becoming its own partition, you can use the Create Design Partition command to create a new partition for that entity.


You can use the Auto-Partition command to create an initial design partitioning scheme. This feature evaluates a compiled design and creates partitions based on an analysis of the design hierarchy; any existing partitions are unaffected by this command. The quality of the partitioning scheme produced by this command is heavily design-dependant, but may help achieve an optimal partitioning scheme.