Integration with Chip Planner:

The Design Partition Planner displays the logical layout of a design and the Chip Planner shows the physical layout. You can have both the Design Partition Planner and the Chip Planner displayed simultaneously, so that you can evaluate both logical and physical layouts and make effective partitioning choices.

You can select the Design Partition Planner task in the Chip Planner to display the physical placement of design entities with the same colors as the corresponding entity representations in the Design Partition Planner.