Output Enable Group logic option
A logic option that assigns an output enable group number for
the specified node. Turning on this option directs the Fitter to
view the specified nodes as an output enable group so that the
design does not violate the requirements for the maximum number of
pins driving out of a VREF
group when a
voltage-referenced input pin or bidirectional pin is present. For
bidirectional pins, the Fitter determines all possible pins that
may potentially drive out when any bidirectional pin is driving in
by looking at the output enable of all the bidirectional pins in
the VREF
group. This behavior can result in the
VREF
group exceeding the maximum number of outputs and
the Fitter is unable to fit the design.
Turning on the Output Enable Group option allows you to
specify an output enable group for specific pins, thus allowing you
to specify which pins in the design are driving in and out at the
same time. The Fitter only considers pins as potential outputs when
they are in separate output enable groups or when they are not in
an output enable group. By specifying an output enable group, you
can lower the total number of outputs in the VREF
group when any pin is driving in. As a result, the Fitter does not
count all of the potential outputs of the bidirectional pins and
the number of outputs in the VREF
group remains within
the legal range. You should turn on this option when the Fitter
cannot detect the output enable group of the pins in the
VREF
group, for example when the output enable comes
from a state machine or complex logic.
This option is useful for specifying the output enable group number of DQ I/O and DQS I/O pins, and DM pins if they are only used during a write operation, for use with the dedicated DDR SDRAM interface. Each individual controller should have a different output enable group number.
For detailed information on the number of outputs supported by a
VREF
group, refer to the device family data sheet
available from the Literature section of the Altera website .
This option must be assigned to a pin or it is ignored. This option is available for all Intel devices supported by the Quartus® Prime software except MAX3000 and MAX7000 devices.
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