NOT Gate Push-Back logic option

A logic option that allows the Compiler to push an inversion (that is, a NOT gate) back through a register and implement it on that register's data input if it is necessary to implement the design. If this option is turned on, a register may power up to an active-high state and it may need to be explicitly cleared during initial operation of the device.

This option must be assigned to either an individual register or a design entity containing registers or it is ignored.

This option is available for all Intel devices.