In order to avoid race conditions in your design, Altera
recommends that you avoid using the same signal source to drive
more than one asynchronous port on a register. The following ports
are affected: aload,
adata,
preset, and
clear.
Important: Important: This rule can be
turned on or off as a global setting for
the entire design on the Design Assistant
page; or enabled or disabled for nodes, entities, or instances with
Rule S103. This rule has a
High severity level.