A feature of logic for supported device(Arriaseries, Cycloneseries, MAXII, StratixIII) families devices that allows a register to be combined with a combinational function in the same logic cell, or to be merged into I/O cells, RAM blocks, or DSP blocks.
This option is useful for reducing logic element count in a design.
You can select a value for the Auto Packed Registers logic option, which allows the Compiler to automatically implement register packing for appropriate pairs of logic functions, with either the Assignment Editor or the Settings dialog box.
You also can manually implement register packing by assigning a register and a combinational function to the same logic cell, or by assigning a register to an I/O cell, DSP block, or RAM block. However, for best results, use the Auto Packed Registers logic option to allow the Compiler to automatically implement register packing, rather than use manual location assignments to implement register packing.