A synchronous, true dual-port memory block, with registered inputs and optionally registered outputs available in supported device(Arriaseries, Cyclone series, and Stratixseries) family devices. ArriaII, StratixIII, and StratixIV family device TriMatrix Memory architecture consists of the M144K, M9k, and MLAB memory blocks. StratixV family device memory architecture consists of the M20K and MLAB memory blocks.