A low-level input voltage represented as a low (0) logic level in binary group values.
In an AHDL Text Design File (.tdf), GND is a predefined constant and keyword, and the default inactive node value. In a VHDL Design File (.vhd), GND is represented by '0'. In a Verilog Design File (.v), GND is represented by 0. In a Block Editor file, GND is a primitive symbol. GND is represented as a low (0) logic level in the Simulator and Waveform Editor.