Working with Nodes in the SignalTap II Logic Analyzer

You can add, delete, or change nodes in an existing SignalTap II instance to specify how internal signals are evaluated and stored in the internal memory during the SignalTap II acquisition. The changes you make are saved to the SignalTap II File (.stp).

SignalTap II incremental compilation increases the speed of the debugging process by allowing you to enable, disable, or modify post-fitting SignalTap II Logic Analyzer nodes in a project without fully recompiling the design. Although the SignalTap II Logic Analyzer can analyze only a limited number of nodes per acquisition, the SignalTap II incremental compilation feature allows you to quickly debug several sets of nodes, or change the configuration or trigger conditions, until you find the problem in the design.

Note: Before you add nodes to the SignalTap II instance you must perform at least an Analysis & Elaboration of the design. After Analysis & Elaboration you can query pre-synthesis nodes in the Node Finder. In order to query post-fitting nodes in the Node Finder you must run the Fitter. After performing Analysis & Elaboration or fully compiling the design, you can open the SignalTap II Logic Analyzer windowto create or modify a SignalTap II File.

Contact Altera | Legal Notice

Copyright© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS, STRATIX, and all other brands, unless noted otherwise, and/or trademarks of Altera Corporation in the U.S. and other countries.