The Quartus® Prime Standard Edition Design Partition Planner can assist you in visualizing a design's structure, and in creating effective design partitions for use with incremental compilation. The Design Partition Planner displays a visual representation of design connectivity and hierarchy, as well as partitions and entity relationships. You can explore the connectivity between entities in the design, evaluate existing partitions with respect to connectivity between entities, and try new partitioning schemes in "what if" scenarios. When you use the Design Partition Planner in conjunction with the TimeQuest Timing Analyzer and the Chip Planner, you can see entity relationships, the timing of paths between entities, existing partitions, LogicLock regions, and physical resource placement, and use that information to effectively partition your design. The Design Partition Planner is available for supported device (Arria V, Arria 10, Cyclone IV, Cyclone V, MAX II, MAX 10, Stratix IV, and Stratix V) families.