List of Messages |
CAUSE: You turned on Timing-Driven Synthesis and set the default logic option Synthesis Effort to value Fast . Timing-Driven Synthesis is skipped when Synthesis Effort is set to Fast.
ACTION: If you want to run Timing-Driven Synthesis, set Synthesis Effort to Auto.
Copyright© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS, STRATIX, and all other brands, unless noted otherwise, and/or trademarks of Altera Corporation in the U.S. and other countries.