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CAUSE: There were multiple calls to derive_pll_clocks with different options. Only an initial call to derive_pll_clocks creates clocks. All subsequent calls are ignored. If any derived clocks are removed between calls to derive_pll_clocks, the next call to derive_pll_clocks will constrain those clocks with the new options.
ACTION: For best results, use only one call to derive_pll_clocks in your Synopsys Design Constraints File (.sdc). If you changed the options to derive_pll_clocks in your .sdc using the TimeQuest Timing Analyzer GUI, you must call reset_design before re-reading the .sdc.
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