List of Messages |
CAUSE: You imported previous Analysis & Synthesis results with an encrypted Verilog Quartus Mapping File (.vqm). The precompiled netlist preserved by this file includes IP for which the Quartus Prime software could not find a license. The OpenCore Plus Hardware Evaluation feature has been disabled because the Quartus Prime software cannot attach timeout logic to the unlicensed IP in these files. As a result, all the IP cores in the design will use the OpenCore Simulation-Only Evaluation feature instead. The OpenCore Simulation-Only Evaluation will allow you to compile and simulate the design, and may allow you to run an EDA simulation flow. However, the Quartus Prime software will not generate a programming file for this project.
ACTION: No action is required.
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