List of Messages |
CAUSE: You turned on the Logic Cell Insertion logic option to add logic cell buffers between the specified nodes in the design. However, you assigned the logic option to nodes that do not have a path between them.
ACTION: Assign the Logic Cell Insertion logic option to data signals that have a local path between them.
Copyright© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS, STRATIX, and all other brands, unless noted otherwise, and/or trademarks of Altera Corporation in the U.S. and other countries.