| List of Messages | |
CAUSE: You directed the Compiler to generate an IBIS Output File (.ibs) for performing board-level signal integrity verification of Altera devices with other EDA tools, specified the RLC (resistance, inductance, and capacitance) IBIS model values to be used for the I/O, dedicated input, VCC, GND, and global clock pins in the IBIS Output File, and then compiled the project. However, characterization data for the selected device is not available.
ACTION: For further assistance contact Altera Technical Support by creating a Service Request at www.altera.com/mysupport.
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