List of Messages
Parent topic: List of Messages

ID:186025 Input clock frequency of LVDS fast PLL "<name>" is not the same as the core clock frequency of LVDS fast PLL "<name>"

CAUSE: The clock frequencies for the specified LVDS fast PLLs are not the same.

ACTION: No action is required. To avoid receiving this message in the future, modify the design to make the input clock frequency of the PLL being driven the same as the core clock frequency of the driving PLL, or turn off the Use Common PLLs for Rx and Tx option in the MegaWizard Plug-In Manager .

Parent topic: List of Messages

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