List of Messages |
CAUSE: You turned on the Auto Packed Registers logic option, and turned on the Fast Input Register , Fast Output Register , and/or Fast Output Enable Register logic options for the specified nodes. The specified node can also be a PLL compensated pin in source synchronous mode. However, the Fitter cannot pack the nodes because the node pair does not contain one logic cell and one I/O cell.
ACTION: If you don't want the Fitter to pack the nodes, no action is required. Otherwise, make sure that the node pair for which you turned on one or more of the above logic options includes one logic cell and one I/O cell.
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